
DDR3 Compliance
Test
Revision 1.7, June, 2010By: ASA
Description
Using the DDR3 Compliance Test with M1 Waveform Tools provides you with an expert solution to your compliance testing needs. M1 Waveform Tools is compatible with every real-time Agilent, Tektronix, LeCroy, Rohde & Schwarz, and Yokogawa scope on the market, including the new Agilent 90000 and Tek 70000 series. In addition, M1 supports digitizers manufactured by Agilent/Acqiris, GaGe, and National Instruments.
By going with the M1 solution, if you don't meet your numbers you have the full power of M1 available to figure out what the problem is. If you need help, you can collaborate instantly by packaging up your waveform and sending it to your local signal integrity guru.
Most major signal standards are included, for free, with every installation of M1. Regardless of what standard you are working with, you will be ready to begin testing immediately with M1.
Specifications/Details
Spec Level: JESD 79-3D, November, 2008
App Update Level/Date: 1.7, June 2010
Best Practices Revision Level: 4
Minimum M1 version required: v6.05.3
App Encryption: none
Measurements Made: Our DDR3 Compliance Test will test the following tables in the JESD79-3D specification
- § 6.1 Table 20 - Absolute Maximum DC Ratings
- § 8.1.1 Table 23 - Single-Ended AC and DC Input Levels for Command and Address
- § 8.1.2 Table 24 - Single-Ended AC and DC Input Levels for DQ and DM
- § 8.3.2 Table 26 - Allowed time before ringback (tDVAC) for CK - CK# and DQS - DQS#
- § 8.3.3 Table 27 - Single-ended levels for CK, DQS, DQSL, DQSU, CK#, DQS#, DQSL# or DQSU#
- § 8.4 Table 28 - Cross point voltage for differential input signals (CK, DQS)
- § 9.3 Table 33 - Output Slew Rate (single-ended)
- § 9.4 Table 35 - Differential Output Slew Rate
- § 9.6.1 Table 36 - AC Overshoot/Undershoot Specification for Address and Control Pins
- § 9.6.2 Table 37 - AC Overshoot/Undershoot Specification for Clock, Data, Strobe and Mask
- § 12.3 Table 60 — DDR3-800 Speed Bins and Operating Conditions
- § 12.3 Table 61 — DDR3-1066 Speed Bins and Operating Conditions
- § 12.3 Table 62 — DDR3-1333 Speed Bins and Operating Conditions
- § 12.3 Table 63 — DDR3-1600 Speed Bins and Operating Conditions
- § 12.3 Table 64 — DDR3-1866 Speed Bins and Operating Conditions
- § 12.3 Table 65 — DDR3-2133 Speed Bins and Operating Conditions
- § 13.1 Table 66 — Timing Parameters by Speed Bin
- § 13.2 Table 67 — Timing Parameters by Speed Bin
Assumptions:
- Testing will require 2 x single-ended and 2 x differential probes
Features
- Not Applicable for this App
Comments
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